From Fedora Project Wiki
No edit summary |
No edit summary |
||
| Line 34: | Line 34: | ||
* '''kicad''': http://iut-tice.ujf-grenoble.fr/kicad/ (User manual into the application) | * '''kicad''': http://iut-tice.ujf-grenoble.fr/kicad/ (User manual into the application) | ||
== Packages shipped with FEL == | |||
== Default packages == | === Default packages === | ||
LabPlot | LabPlot | ||
alliance | alliance | ||
| Line 148: | Line 148: | ||
xorg-x11-fonts-Type1 | xorg-x11-fonts-Type1 | ||
== Optional Packages == | === Optional Packages === | ||
freehdl | freehdl | ||
kdesvn | kdesvn | ||
Latest revision as of 18:52, 24 July 2010
This page is a draft only
It is still under construction and content may change. Do not rely on the information on this page.
It is still under construction and content may change. Do not rely on the information on this page.
References to guides/tutorial of the tools that ship with FEL:
ASIC Analog Circuit Design and Simulation
- gnucap: http://gnucap.org/gnucap-man-html/index.html
- ngspice: http://ngspice.sourceforge.net/docs.html
- gspiceui: http://gspiceui.sourceforge.net/ (User manual into the application)
- xcircuit schematic: http://opencircuitdesign.com/xcircuit/
ASIC Layout, DRC and LVS
- Magic VLSI: http://opencircuitdesign.com/magic/index.html
- Electric VLSI: http://www.staticfreesoft.com/documents.html
- Toped: http://www.toped.org.uk/index.html (missing)
- netgen: http://opencircuitdesign.com/netgen/
Digital Simulation and Verification
- GHDL: http://ghdl.free.fr/manual.html
- Qucs: http://qucs.sourceforge.net/docs.html
- FreeHDL: http://www.freehdl.seul.org/ (man page)
- Icarus Verilog: http://www.icarus.com/eda/verilog/ (man page)
- GTKWave: http://gtkwave.sourceforge.net/ (man page)
- DrawTiming: http://drawtiming.sourceforge.net/ (man page)
RTL and logic synthesis design flows
- pharosc (library): http://www.vlsitechnology.org/index.html (man page)
- Alliance: http://www-asim.lip6.fr/recherche/alliance/doc/design-flow/index.html
- gds2pov: http://www.atchoo.org/gds2pov/ (missing)
Circuit and PCB Layout
- PCB: http://pcb.gpleda.org/manual.html
- gerbv: http://gerbv.gpleda.org/index.html (man page)
- gEDA: http://geda.seul.org/wiki/
- kicad: http://iut-tice.ujf-grenoble.fr/kicad/ (User manual into the application)
Packages shipped with FEL
Default packages
LabPlot alliance archimedes arm-gp2x-linux-SDL arm-gp2x-linux-binutils arm-gp2x-linux-gcc arm-gp2x-linux-gcc-c++ arm-gp2x-linux-glibc arm-gp2x-linux-kernel-headers arm-gp2x-linux-zlib avarice avr-binutils avr-gcc avr-gcc-c++ avr-gdb avra avrdude covered dfu-programmer dia-CMOS dia-Digital dia-electric2 dia-electronic dinotrace drawtiming eclipse-cdt eclipse-dltk-tcl eclipse-eclox eclipse-epic eclipse-subclipse eclipse-texlipse eclipse-veditor electric emacs-dinotrace emacs-verilog-mode emacs-vregs-mode eqntott espresso-ab fped gds2pov geda-gaf gerbv ghc-chalmers-lava2000-devel ghdl gnucap gnuradio gnusim8085 gplcver gpsim gputils gresistor gsim85 gspiceui gtkterm gtkwave gwave hct irsim iverilog kicad ktechlab linsmith magic magic-doc mcu8051ide netgen ngspice ngspice-doc openocd pcb perl-Hardware-Verilog-Parser perl-Hardware-Vhdl-Lexer perl-Hardware-Vhdl-Parser perl-Hardware-Vhdl-Tidy perl-ModelSim-List perl-Perlilog perl-SystemC-Vregs perl-SystemPerl perl-Verilog perl-Verilog-CodeGen perl-Verilog-Readmem pharosc pharosc-alliance pharosc-magic pharosc-synopsys pharosc-xcircuit picocom picprog pikdev piklab pikloops qtoctave qucs sdcc sk2py tclspice tetex-IEEEtran tkcvs tkgate toped uisp usrp verilator vhd2vl vrq xcircuit xorg-x11-fonts-100dpi xorg-x11-fonts-ISO8859-1-100dpi xorg-x11-fonts-ISO8859-9-100dpi xorg-x11-fonts-Type1
Optional Packages
freehdl kdesvn minicom octave-forge rfdump simulavr