Architectures/RISC-V

RISC-V (pronounced "RISC Five") is an open source instruction set architecture (ISA). This project, informally called Fedora/RISC-V, aims to get Fedora bootstrapped on the RISC-V (64 bit) architecture.

Topics

• Architectures/RISC-V/Bootstrapping - Find out how to take part in the current bootstrapping of Fedora on RISC-V, how to build RPMs, common problems, etc.
• Architectures/RISC-V/FPGA - How to run Fedora/RISC-V on real hardware (well, an FPGA).

Downloads

• http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/
  • COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain
• https://github.com/rwmjones/fedora-riscv
  • Git repository containing the bootstrapping work. Read the README file!
• http://oirase.annexia.org/riscv/
  • Interim stage3 disk image.

Status

Last updated: 2016-08-20

Status: The stage3 disk image used for bootstrapping now boots to a shell, with GCC, numerous developer utilities, rpmbuild and Perl. rpmbuild can be used to build packages for stage4. Please read Architectures/RISC-V/Bootstrapping for further information.

For the detailed information, see: https://github.com/rwmjones/fedora-riscv

Communications

There is no specific mailing list. Use Fedora devel for now.

On FreeNode IRC: #fedora-riscv

People

• Richard Jones
  

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