RISC-V (pronounced "RISC Five") is an open source instruction set architecture (ISA). This project, informally called Fedora/RISC-V, aims to get Fedora bootstrapped on the RISC-V (64 bit) architecture.
Topics
- Architectures/RISC-V/Bootstrapping - Find out how to take part in the current bootstrapping of Fedora on RISC-V, how to build RPMs, common problems, etc.
- Architectures/RISC-V/FPGA - How to run Fedora/RISC-V on real hardware (well, an FPGA).
Downloads
- http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/
- COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain
- https://github.com/rwmjones/fedora-riscv
- Git repository containing the bootstrapping work. Read the README file!
- http://oirase.annexia.org/riscv/
- Interim stage3 disk image built by rwmj
- http://davidlt.web.cern.ch/davidlt/riscv/
- Interim stage3 disk and kernel images built by davidlt.
Status
Last updated: 2016-09-18
Status: The stage3 disk image used for bootstrapping now boots to a shell, with GCC, numerous developer utilities, rpmbuild, Perl, Python 2, Python 3. rpmbuild can be used to build packages for stage4. Please read Architectures/RISC-V/Bootstrapping for further information.
An experimental stage4 disk image is available however note that RPM is broken inside the image.
For the detailed information, see: https://github.com/rwmjones/fedora-riscv
Communications
There is no specific mailing list. Use Fedora devel for now.
On FreeNode IRC: #fedora-riscv
People
- Richard Jones
- David Abdurachmanov
(add your name here)